Body by Pulsar, Brain by... Nortec?

[abem]

Pulsar fans,

Well, I have a module for a ladies P4 era model that I have never been able to get to work. Tried replacing the quartz, the ol' hairdryer treatment, etc. So, I finally decided to sacrifice it to discovery and dissect it. I thought I'd look behind the curtain to see the main IC and what markings might appear on it as they frequently do with older chips.

Here is the answer to that question:
Enlarge (3600x2400): http://img717.imageshack.us/img717/964/ ... 0x2400.jpg


I thought I might find a Time Computer marking or perhaps the marking of a well known semiconductor company such as Fairchild, Hughes, etc. but instead, the chip is signed by a little known company called Nortec.


In addition, it appears that the designer has signed the chip - a mysterious "DPB". Any idea who this person might be?

Just curious - did Time Computer use Nortec as the chip fabricator or did Nortec also design the chip? Also, did Time Computer use other "partner" companies for this sort of thing?

-abe.

[bruce wegmann]

Yes, other Companies WERE involved. I have a P3 chip signed by Hughes. And, that chip was specifically made for Time Computer; it has the "PULSAR" logo in the same font as is used on the top of the brown clamshell boxes. Sorry, I don't have a good camera-microscope setup, or I'd be happy to post a pic...

[rewolf]

Some of the wire-bond joints on the chip look funny - as if it had been re-bonded once... maybe someone with more experience in this regard can shed some light on it...

[bruce wegmann]

These wires are "wedge-bonded", a process where a metal wedge [very tiny, of course], presses the wire against the bonding pad and vibrated at ultrasonic frequency, generating enough frictional heat to create the bond...this is most often used with aluminum wire, which has a lower melting point than gold. Gold bonds are often done with the "ball bond" method, where the tip of the wire is melted with a low-voltage spark [surface tension of the melted metal pulls it into a ball-shaped droplet], and then touched to the bonding pad while it is still molten. Now we know that at least three IC manufacturers were involved in providing clock chips to Time Computer...RCA, Hughes, and Nortec.

[rewolf]

These wires are "wedge-bonded", a process where a metal wedge [very tiny, of course], presses the wire against the bonding pad and vibrated at ultrasonic frequency, generating enough frictional heat to create the bond....

Yes, sure, but that's not what I mean.
I mean some of the PADS on the CHIP look funny, not the wires. E.g. the one to the right of the Nortec logo

[J Thomas]

[rewolf]

...
The die has been probed.

What you are seeing is overscrub. The cantilever probes create a scrub mark that appears radially. Typically from center to the inside of the pad.

It appears this die was probed with a Beryllium cantilever probe card.
And the Z axis overtravel was set a little too high. When the wires were bonded, the person operating the wedge bonder tries to avoid attaching on top of a probe mark since the remaining aluminum is often too thin for attaching to. That sometimes forces them to bond close to the edge of the pad.
....

Jeff, I had hoped you would be able to answer my question in depth - and you did. Even more than I expected! Thanks a lot!
I'm quite amazed that you can even see it was a Beryllium probe and not, say, Palladium or Tungsten?

[clockace]

awesome knowledge of electronic processes both past and present. peter

[J Thomas]

[charger105]

Thanks for sharing your knowledge on this subject with us all Jeff. I'm sure there are many on this forum who have had very little exposure to this sort of thing (including myself !).
I have a few basic questions I'm sure you can answer:

1. This probe you're talking about---is this for testing the chips function prior to wire-bonding ? If so, would this be done randomly on a batch to ensure quality control ?

2. The squiggly traces in the image---can these be though of similarly to traces on a PCB ? If so, where are the transistors in the image ? Or are they too small to see ?

3. Is this chip a multi-layer thing (similar to a multi-layer PCB) ?

Rgds,
Andrew.

[bruce wegmann]

ALL ICS are tested this way, not just before wire-bondng, but before the wafer is scribed and cut into individual die [chips]. Defective circuits a marked with a dot of dye, to disinguish them from the good ones. Nowadays, this is all totally automated, and chips can go all the way from beginning to end of the production line without human intervention. This was not so true in the early 70s; the clock chips Time Computer was getting from RCA were originally running nearly $50 a copy, with yields of one or two percent...today, a similar clock chip costs about twenty cents. In 1969, when I bought my first pocker calculator, 3 thousand transistors was considered ELSI [Extremely Large Scale Integration]; modern high-end CPUs contain more than 3 million, with yields of better than 40%. We've come a long way in just 40 years...

[J Thomas]

[Led-Time]

In 1969, when I bought my first pocker calculator, 3 thousand transistors was considered ELSI [Extremely Large Scale Integration]

Interesting stuff...Bruce you mentioned calculators I've got an early Sharp form 1972 which has Elsi written on it I always thought it was just a name they invented for the calculator, you learn something new every day...

[clockace]

yes, jeff, i remember seeing all of them. what was even more fascinating was watching them do their stuff fully automated. peter

[charger105]

Thank-you Jeff and Bruce.
Fascinating stuff ! For those of us not born before, or never exposed to the IC revolution, it's a real insight.

Most of use just think of an IC as a "black box" without any real understanding of how they're made or what's inside.

Thanks again.
Rgds,
Andrew.